VLSI CAD

a steiner routing tree

My undergraduate work was in VLSI CAD, assisting Prof. Gabriel Robins at the University of Virginia.

Publications and Technical Reports

• Dynamically-Wiresized Elmore-Based Routing Constructions
  T. D. Hodes, B. A. McCoy, G. Robins
  Proc. IEEE International Symposium on Circuits and Systems (ISCAS '94),
  London, England, May 1994, Volume I, pp. 463-466. ( .ps - 147KB)

• A Routing Algorithm to Aid in the Design of High-Performance VLSI Circuits
  T. D. Hodes
  Undergraduate Thesis, University of Virginia, Charlottesville, 1994.
  (Steiner trees in the rectilinear plane under the Elmore metric, with the added idea of allowing resistance/capacitance trade-off via variable wire width.) ( .ps - 208KB, 44 pp.)